12 Comments

  1. Sunil Sonta

    How to give delay between two test cases..?plz explain with example..?

    Reply
    1. admin

      Hi Sunil,

      First of all why do you want to give delay ? Are you testing in HSIT/SSIT ?

      Regards,
      Siva

      Reply
  2. Sunil Sonta

    Hi Siva,
    Im doing SSIT .

    Regards
    Sunil

    Reply
  3. Vaishu

    Hi,

    Just want to know how to test CAN related requirements,cold and warm start related requirements, interrupt, trigger related requirements in HSIT..?
    If you explain with an example like ARINC it will be very useful.

    Reply
  4. Vaishu

    Hi,
    Justice want to know how to test CAN, cold start, warm start, trigger, interrupt, timing related requirements in HSIT. If you can explain with an example like ARINC then it will be very useful.

    Reply
  5. Keerthi

    Hi,
    I need a clarification on ARINC SDI bits, the possible combinations are 11 ,01,00,10. But as per ARINC document upto 20 receivers are possible. How 20 receivers are possible is my doubt.

    Thanks,

    Reply
    1. admin

      Hi Keerthi,

      Actually the twisted pair cable hold the resistance of 400 ohms, hence the 20 receivers only possible to transmit. Please refer the below information.

      Differential Input Resistance R I
       12,000 ohms minimum Differential Input Capacitance C I  50 pF maximum Resistance to Ground R H and R G  12,000 ohms Capacitance to Ground C H and C G  50 pF The total receiver input resistance including the effects of R
      I
      , R H
      and R G
      in parallel is 8000 ohms minimum (400 ohms minimum for 20 receivers). A maximum of 20 receivers is specified for any one transmitter.

      Reply
    2. admin

      Hi Keerthi,

      The Arinc Twisted pair cable has the resistance of 400 ohms to hold and this can be transmitted to only 20 receiver for successful transmission.

      hope I answered your question.

      Reply
  6. Keerthi

    hi,

    In HSIT, a requirement says that inputs X ,Y are set to TRUE for 5 seconds, then output Z is TRUE.

    How to verify timing part here? Is the robust test case possible here ?

    Reply
    1. admin

      Hi Keerthi,

      Please refer the Testing interview post in the same site, I mentioned such scenarios , if you still have the doubt I can try to answer.

      Thanks for the Comment.

      Reply
  7. Keerthi

    Hi ,
    Please clarify why label is transmitted in reverse order from bit 8 to 1 ?
    what happens if the label is wrong ?

    Thanks,

    Reply

Leave a Reply

Your email address will not be published. Required fields are marked *