FBY Operator :
- FBY operator will delay the input by ‘n’ number of cycles.
- For the first test case (generally INIT variable should be set to 1), the output will take the default initialized values as shown in figure(Example: 0.0 in the given FBY diagram)
- From second test case onwards, (generally INIT variable should be set to 0), the output will take the previous cycle values based on the number of cycles delay. In first diagram, the number of cycles delay is 1 and in second diagram, the number of cycles delay is 2.
- For example, if the number of cycles delay is 2, then the third test case FBY output will be delayed by 2 cycles, that is, the third test case FBY output will be the first test case FBY input value.
Counter Operator :
- If the reset is false, then the output ‘Count’ equals to the value of the IN variable ‘Incr’.
- If the reset is zero for 10 cycles, then the output ‘Count’ equals to the value of the IN variable ‘Incr’ in to 10. That is, in each cycle, the counter will get incremented by the value of ‘Incr’.
- If the reset is True, then the output of the counter ‘Count’ will be reset to zero
CONDACT Operator :
N is executed only when “b” is true and its outputs remain unchanged the rest of the time. The initialization values Init1 and Init2 are necessary only when b is false during the first cycle.
- In first test cycle, the condition terminal value should be set to zero, then the outputs(s1, s2) will be getting updated with initial values(Init1, Init2).
- In second test cycle on wards, if the condition terminal value is true, then the outputs(s1, s2) will be calculated as per the function ‘N’ with the input parameters as e1, e2 and e3.
- In third test cycle on wards, if the condition terminal value is false, then the outputs(s1, s2) will be retained with the previous test cycle values.
Overflow and Under Flow :
- The overflow and under flow will occur whenever addition, summation, multiplication and division operators are used in our SCADE models and both input and output data types of these operators are same.
- In these scenarios, the correct combination of data type minimum and maximum value test cases should be created and failed for the over flow and under flow. As per the below example, the over flow and under flow will occur at the intermediate local variables L308,L310 and L304.
Generally light yellow color box is indication of called function.
Operator symbols will be in blue color
Graphical representation from model
Graphical representation from library
INIT Modules :
How to test Init modules?
- If the INIT module is empty, then the whole structure parameter (Generally _C_) should be made as INOUT in interface except local variables and need to be created two steps in single test case. One test step should be created with all zero’s for all the structure members and another test step should be created with all ones for all the structure members.
- If the INIT module is not empty, then the relevant init variables should be set to INOUT in interface and one test case should be created with input as zero and expected output should be 1.
SR Flip Flop Design :
How to test the SR flip Flop:
Dead Band :
suppose ranges are given as -5 and +5. if the input is in-between -5 and +5 then the output will be ZERO.
If input is <-5 or >+5 Then the output will be the input what ever you gave.